da850evm: fix NAND WSTROBE and TA timings
authorBen Gardiner <[email protected]>
Wed, 20 Apr 2011 20:25:06 +0000 (16:25 -0400)
committerAlbert ARIBAUD <[email protected]>
Wed, 11 May 2011 21:03:15 +0000 (23:03 +0200)
commit24a514c44557601de52df3c8bc0ee789bef8714c
treeb531c237630d85e61ecdccb526eae14731b58964
parent264eaa0ea967bac32214b87d60cfc86c8b22cac6
da850evm: fix NAND WSTROBE and TA timings

The current NAND timings, introduced in commit
a3f88293ddd13facd734769c1664d35ab4ed681f da850evm: setup the NAND flash
timings , incorrectly set WSTROBE and TA to 0. A more recent inspection of the
values set by the Linux kernel indicates that these should be set to 1.

Set the WSTROBE and TA field of the EMIFA cycle-count timings configuration to
1 to match the values set by linux.

Signed-off-by: Ben Gardiner <[email protected]>
CC: Stefano Babic <[email protected]>
CC: Sandeep Paulraj <[email protected]>
CC: Scott Wood <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
board/davinci/da8xxevm/da850evm.c